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GlobalFoundries GF180MCU PDK
10.4 MIM (Metal-insulator-Metal) Capacitor (Optional)
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GlobalFoundries GF180MCU PDK 0.0.0-111-gde3240d documentation
Physical Verification
Design Manual
10.0 Analog Device Related Rules
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GlobalFoundries GF180MCU PDK
gf180mcu-pdk
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Physical Verification
Design Manual
1.0 Purpose
2.0 Scope
3.0 Layout Information
4.0 Topological Level Definitions
5.0 DFM (Design For Manufacturability) Guidelines
6.0 Essential Tapeout Checklist
7.0 Layout Rule Description
8.0 Antenna Ratio Rules
9.0 Bond Pad
10.0 Analog Device Related Rules
10.1 P+ Poly Resistor (PRES)
10.2 N+ Poly Resistor (Low SHEET RHO)
10.3 HRES Poly Resistor (PHRES) (Optional with one additional mask)
10.4 MIM (Metal-insulator-Metal) Capacitor (Optional)
10.4.1 MIM Option A
10.4.2 MIM Option B
10.5 Native Vt NMOS (Optional)
10.6 Match pair layout guidelines
10.7 DRC_BJT Mark Layer
10.8 Design Rules for Dummy Exclude layers (NDMY and PMNDMY)
10.9 LVS_BJT Mark Layer
10.10 OTP_MK Mark Layer
10.11 0.18um MCU eFuse Design Rules
10.12 High Voltage LDMOS and related rules
10.13 YMTP_MK Mark Layer Rules
10.14 Schottky Diode
10.15 NEO_EE_MK Layer
11.0 SRAM Core Cells
12.0 Scribe Line & Guard Ring Rules And Guidelines
13.0 Dummy Fill Rules And Guidelines
14.0 Reliability Related Rules And Guidelines
Appendix A: Device List for Model and LVS Deck
Appendix B: Rules not coded
Versioning Information
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10.4 MIM (Metal-insulator-Metal) Capacitor (Optional)
ΒΆ
10.4.1 MIM Option A
10.4.2 MIM Option B