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GlobalFoundries GF180MCU PDK 11.0 SRAM Core Cells
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        • 1.0 Purpose
        • 2.0 Scope
        • 3.0 Layout Information
        • 4.0 Topological Level Definitions
        • 5.0 DFM (Design For Manufacturability) Guidelines
        • 6.0 Essential Tapeout Checklist
        • 7.0 Layout Rule Description
        • 8.0 Antenna Ratio Rules
        • 9.0 Bond Pad
        • 10.0 Analog Device Related Rules
          • 11.1 5V SRAM
          • 11.2 3.3V SRAM
        • 12.0 Scribe Line & Guard Ring Rules And Guidelines
        • 13.0 Dummy Fill Rules And Guidelines
        • 14.0 Reliability Related Rules And Guidelines
        • Appendix A: Device List for Model and LVS Deck
        • Appendix B: Rules not coded
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    11.0 SRAM Core CellsΒΆ

    • 11.1 5V SRAM
    • 11.2 3.3V SRAM
    Previous 10.15 NEO_EE_MK Layer
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