2.2 Model Features and Limitations

Device width and length in a FET call

During a FET netlist call, users should use design dimension for W and L, not effective width and length. In this release, the BSIM model parameter Lmin is set to the nominal drawn gate length. This may cause warnings to be generated during corner simulations when the biased gate length becomes less than Lmin. This warning has no effect on the simulation results.

2.2.1 LV NMOS and LV PMOS (3.3V)

Device size (unit - um)

W X L	100	10	1	0.5	0.28
50	+	+	+	+	+
10	+	x	x	x	x
1.2	+	x	x	x	x
0.5	+	x	x	x	x
0.22	+	x	x	x	x

Note

• x - device with measured data and used for binned model extraction

• • • Pseudo device