gf180mcu_fd_sc_mcu9t5v0__latq_4

gf180mcu_fd_sc_mcu9t5v0__latq_4 symbol

gf180mcu_fd_sc_mcu9t5v0__latq_4 schematic

gf180mcu_fd_sc_mcu9t5v0__latq_4 layout

LATQ_X4 is a positive D-latch with 4X drive strength

Attributes

Attribute	Value
area	79.027200 µm2

TRUTH TABLE

Input		Output
D	E	Q
L	H	L
H	H	H
X	L	Q

FUNCTIONAL SCHEMATIC

CONSTRAINTS

Constraint Pin	Related Pin	setup(ns)	hold(ns)
D(LH)	E(HL)	0.3720	-0.3030
D(HL)	E(HL)	0.7500	-0.6530

Constraint Pin	Related Pin	Minimum Pulse Width(ns)
E(LHL)	E(LH)	0.7880
E(LHL)	E(LH)	0.5640

PIN CAPACITANCE (pf)

Pin	Type	Capacitance (pf)
E	input	0.0050
D	input	0.0041

DELAY AND OUTPUT TRANSITION TIME corresponding to min slew and load

Input Pin	Output	When Condition	Tin (ns)	Out Load (pf)	Delay (ns)	Tout (ns)
E(LH)	Q(LH)	D	0.0100	0.0010	0.7084	0.0664
E(LH)	Q(HL)	!D	0.0100	0.0010	0.7867	0.1116
D(LH)	Q(LH)	E	0.0100	0.0010	0.5292	0.0670
D(HL)	Q(HL)	E	0.0100	0.0010	0.7494	0.1116

DYNAMIC ENERGY

Input Pin	When Condition	Tin (ns)	Output	Out Load (pf)	Energy (uW/MHz)
D	E	0.0100	Q(LH)	0.0010	1.7868
D	E	0.0100	Q(HL)	0.0010	3.1045
E	D	0.0100	Q(LH)	0.0010	1.9720
E	!D	0.0100	Q(HL)	0.0010	3.2146
E(LH)	!D	0.0100	n/a	n/a	0.1685
E(LH)	D	0.0100	n/a	n/a	0.1658
D(LH)	!E	0.0100	n/a	n/a	-0.0316
E(HL)	!D	0.0100	n/a	n/a	0.3016
E(HL)	D	0.0100	n/a	n/a	0.3045
D(HL)	!E	0.0100	n/a	n/a	0.0342

LEAKAGE POWER

When Condition	Power (nW)
!D&!E	0.4428
D&!E	0.4700
!D&E	0.3533
D&E	0.3437