gf180mcu_fd_sc_mcu9t5v0__latq_1

gf180mcu_fd_sc_mcu9t5v0__latq_1 symbol

gf180mcu_fd_sc_mcu9t5v0__latq_1 schematic

gf180mcu_fd_sc_mcu9t5v0__latq_1 layout

LATQ_X1 is a positive D-latch with 1X drive strength

Attributes

Attribute	Value
area	56.448000 µm2

TRUTH TABLE

Input		Output
D	E	Q
L	H	L
H	H	H
X	L	Q

FUNCTIONAL SCHEMATIC

CONSTRAINTS

Constraint Pin	Related Pin	setup(ns)	hold(ns)
D(LH)	E(HL)	0.1550	-0.0800
D(HL)	E(HL)	0.4640	-0.3490

Constraint Pin	Related Pin	Minimum Pulse Width(ns)
E(LHL)	E(LH)	0.5050
E(LHL)	E(LH)	0.3490

PIN CAPACITANCE (pf)

Pin	Type	Capacitance (pf)
E	input	0.0051
D	input	0.0040

DELAY AND OUTPUT TRANSITION TIME corresponding to min slew and load

Input Pin	Output	When Condition	Tin (ns)	Out Load (pf)	Delay (ns)	Tout (ns)
E(LH)	Q(LH)	D	0.0100	0.0010	0.4715	0.0478
E(LH)	Q(HL)	!D	0.0100	0.0010	0.4295	0.0654
D(LH)	Q(LH)	E	0.0100	0.0010	0.2898	0.0481
D(HL)	Q(HL)	E	0.0100	0.0010	0.3938	0.0661

DYNAMIC ENERGY

Input Pin	When Condition	Tin (ns)	Output	Out Load (pf)	Energy (uW/MHz)
D	E	0.0100	Q(LH)	0.0010	0.4241
D	E	0.0100	Q(HL)	0.0010	0.6519
E	D	0.0100	Q(LH)	0.0010	0.6130
E	!D	0.0100	Q(HL)	0.0010	0.7522
E(LH)	!D	0.0100	n/a	n/a	0.1652
E(LH)	D	0.0100	n/a	n/a	0.1625
D(LH)	!E	0.0100	n/a	n/a	-0.0316
E(HL)	!D	0.0100	n/a	n/a	0.3050
E(HL)	D	0.0100	n/a	n/a	0.3076
D(HL)	!E	0.0100	n/a	n/a	0.0342

LEAKAGE POWER

When Condition	Power (nW)
!D&!E	0.3372
D&!E	0.3677
!D&E	0.2461
D&E	0.2415