gf180mcu_fd_sc_mcu9t5v0__dffq_4

gf180mcu_fd_sc_mcu9t5v0__dffq_4 symbol

gf180mcu_fd_sc_mcu9t5v0__dffq_4 symbol

gf180mcu_fd_sc_mcu9t5v0__dffq_4 schematic

gf180mcu_fd_sc_mcu9t5v0__dffq_4 schematic

gf180mcu_fd_sc_mcu9t5v0__dffq_4 layout

gf180mcu_fd_sc_mcu9t5v0__dffq_4 layout
DFFQ_X4 is a Poisitive edge triggered D-type flip flop with 4X drive strength

Attributes

Attribute

Value

area

98.784000 µm2


TRUTH TABLE

Input

Output

D

CLK

Q

L

L

H

H


FUNCTIONAL SCHEMATIC
../../../../../_images/gf180mcu_fd_sc_mcu9t5v0__dffq_4.png
CONSTRAINTS

Constraint Pin

Related Pin

setup(ns)

hold(ns)

D(LH)

CLK(LH)

0.1830

0.0230

D(HL)

CLK(LH)

0.1430

0.1260


Constraint Pin

Related Pin

Minimum Pulse Width(ns)

CLK(LHL)

CLK(LH)

0.3290

CLK(LHL)

CLK(LH)

0.4070

CLK(HLH)

CLK(HL)

0.4000

CLK(HLH)

CLK(HL)

0.3080


PIN CAPACITANCE (pf)

Pin

Type

Capacitance (pf)

CLK

input

0.0050

D

input

0.0038


DELAY AND OUTPUT TRANSITION TIME corresponding to min slew and load

Input Pin

Output

When Condition

Tin (ns)

Out Load (pf)

Delay (ns)

Tout (ns)

CLK(LH)

Q(HL)

!D

0.0100

0.0010

0.5931

0.0283

CLK(LH)

Q(LH)

D

0.0100

0.0010

0.5667

0.0297


DYNAMIC ENERGY

Input Pin

When Condition

Tin (ns)

Output

Out Load (pf)

Energy (uW/MHz)

CLK

!D

0.0100

Q(HL)

0.0010

1.4348

CLK

D

0.0100

Q(LH)

0.0010

1.4368

D(LH)

!CLK

0.0100

n/a

n/a

0.1531

D(LH)

CLK

0.0100

n/a

n/a

-0.0240

CLK(LH)

!D

0.0100

n/a

n/a

0.2599

CLK(LH)

D

0.0100

n/a

n/a

0.2592

D(HL)

!CLK

0.0100

n/a

n/a

0.2293

D(HL)

CLK

0.0100

n/a

n/a

0.0223

CLK(HL)

!D

0.0100

n/a

n/a

0.3947

CLK(HL)

D

0.0100

n/a

n/a

0.4077


LEAKAGE POWER

When Condition

Power (nW)

!CLK&!D

0.4524

!CLK&D

0.4916

CLK&!D

0.5962

CLK&D

0.7034