gf180mcu_fd_sc_mcu7t5v0__dffnq_4

gf180mcu_fd_sc_mcu7t5v0__dffnq_4 symbol

gf180mcu_fd_sc_mcu7t5v0__dffnq_4 symbol

gf180mcu_fd_sc_mcu7t5v0__dffnq_4 schematic

gf180mcu_fd_sc_mcu7t5v0__dffnq_4 schematic

gf180mcu_fd_sc_mcu7t5v0__dffnq_4 layout

gf180mcu_fd_sc_mcu7t5v0__dffnq_4 layout

DFFNQ_X4 is a negative edge triggered D-type flip flop, 4X drive strength


Attributes

Attribute

Value

area

83.417600 µm2


TRUTH TABLE

Input

Output

D

CLKN

Q

L

L

H

H


FUNCTIONAL SCHEMATIC
../../../../../_images/gf180mcu_fd_sc_mcu7t5v0__dffnq_4.png
CONSTRAINTS

Constraint Pin

Related Pin

setup(ns)

hold(ns)

D(HL)

CLKN(HL)

0.2690

0.0690

D(LH)

CLKN(HL)

0.1660

0.1490


Constraint Pin

Related Pin

Minimum Pulse Width(ns)

CLKN(LHL)

CLKN(LH)

0.4120

CLKN(LHL)

CLKN(LH)

0.3630

CLKN(HLH)

CLKN(HL)

0.4460

CLKN(HLH)

CLKN(HL)

0.4950


PIN CAPACITANCE (pf)

Pin

Type

Capacitance (pf)

CLKN

input

0.0035

D

input

0.0024


DELAY AND OUTPUT TRANSITION TIME corresponding to min slew and load

Input Pin

Output

When Condition

Tin (ns)

Out Load (pf)

Delay (ns)

Tout (ns)

CLKN(HL)

Q(LH)

D

0.0100

0.0010

0.7513

0.0436

CLKN(HL)

Q(HL)

!D

0.0100

0.0010

0.6733

0.0526


DYNAMIC ENERGY

Input Pin

When Condition

Tin (ns)

Output

Out Load (pf)

Energy (uW/MHz)

CLKN

D

0.0100

Q(LH)

0.0010

1.3002

CLKN

!D

0.0100

Q(HL)

0.0010

1.2412

D(LH)

!CLKN

0.0100

n/a

n/a

0.0050

D(LH)

CLKN

0.0100

n/a

n/a

0.1310

CLKN(LH)

!D

0.0100

n/a

n/a

0.1983

CLKN(LH)

D

0.0100

n/a

n/a

0.1987

CLKN(HL)

!D

0.0100

n/a

n/a

0.3094

CLKN(HL)

D

0.0100

n/a

n/a

0.3093

D(HL)

!CLKN

0.0100

n/a

n/a

0.0571

D(HL)

CLKN

0.0100

n/a

n/a

0.2043


LEAKAGE POWER

When Condition

Power (nW)

!CLKN&!D

0.5559

CLKN&!D

0.4903

!CLKN&D

0.5564

CLKN&D

0.4857