gf180mcu_fd_sc_mcu7t5v0__clkbuf_2

gf180mcu_fd_sc_mcu7t5v0__clkbuf_2 symbol

gf180mcu_fd_sc_mcu7t5v0__clkbuf_2 schematic

gf180mcu_fd_sc_mcu7t5v0__clkbuf_2 layout

CLKBUF_X2 is a clock buffer, 2X drive strength

Attributes

Attribute	Value
area	17.561600 µm2

OUTPUT FUNCTIONS

Output Pin	Function
Z	I

TRUTH TABLE FOR Z

I	Z
1	1
0	0

FUNCTIONAL SCHEMATIC

PIN CAPACITANCE (pf)

Pin	Type	Capacitance (pf)
I	input	0.0037

DELAY AND OUTPUT TRANSITION TIME corresponding to min slew and load

Input Pin	Output	When Condition	Tin (ns)	Out Load (pf)	Delay (ns)	Tout (ns)
I(LH)	Z(LH)	default	0.0100	0.0010	0.1834	0.0352
I(HL)	Z(HL)	default	0.0100	0.0010	0.1698	0.0333

DYNAMIC ENERGY

Input Pin	When Condition	Tin (ns)	Output	Out Load (pf)	Energy (uW/MHz)
I	default	0.0100	Z(LH)	0.0010	0.1795
I	default	0.0100	Z(HL)	0.0010	0.2507

LEAKAGE POWER

When Condition	Power (nW)
!I	0.1306
I	0.1277